CPSC 614 Research Project

The following are the details of the CPSC 614 research project:

• Teams of up to 4 students.
• Final report due on April 26, 2007 to HRBB 416 as hard copy.
• The final report will be 10 to 20 double spaced pages, in the format of a technical paper. The report must follow a specified journal or conference format (except for the double spacing), with the journal specified as a footnote. The report should describe your work in detail. In particular, it should include an abstract, introduction, description of your problem (including previous work), description of the proposed improvement, results, performance analysis, conclusions, and a list of references formatted and cited as required by your journal or conference model. Include all your work - diagrams, simulation code, sample runs of your experiments/simulations, description of how the work was divided among the authors, and other relevant information as appendices (these do not count in your 10-20 pages). If you have a large amount of data, your appendix can just provide an overview of its contents.
• Attach the Research Project Cover Sheet and Evaluation Form as the first page of the project report (this does not count as a page).

Project Ideas

Suitable research project ideas can come from your research, the textbook, colleagues or a literature survey. The project should propose some sort of design improvement to CPU, ISA, compiler techniques, interconnection networks, or memory hierarchy and evaluate the same using a simulator, experiments on existing systems, or suitable analytical methods. Some sources of ideas:

• International Symposium on Computer Architecture (ISCA)
• International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS)
• Architectural Support for Programming Languages and Operating Systems (ASPLOS)
• International Symposium on Microarchitecture (MICRO)
• International Conference on Mobile Computing and Networking (MobiCom)
• International Symposium on High-Performance Computer Architecture (HPCA)
• ACM IEEE Design Automation Conference (DAC)
• International Symposium on Low Power Electronics and Design (ISLPED)
• List of papers on the SimpleScalar web site: http://www.simplescalar.com/friends.html
• List of projects mentioned in the PROJECTS file distributed with SimpleScalar tools
• Evaluating cache memory hierarchy using microbenchmarks. Also see http://www.cs.auckland.ac.nz/~cthombor/Perf/Cache/cachp.ps.gz.

SimpleScalar is a set of system simulation tools, that is one option to evaluate designs.

Spring 2006 Projects:

• BIONET: Low Power Biological Sensor Network
• The V-way Cache: Demand-Based Associativity via Global Replacement
• The V-way Cache: Demand-Based Associativity via Global Replacement
• Low Cost Instruction Cache Design for Tag Comparison Elimination
• Increasing Cache Efficiency by Eliminating Noise
• Increasing Cache Efficiency by Eliminating Noise
• Using a Victim Buffer in an Application-Specific Memory Hierarchy
• Dynamic Split: Flexible Border Between Instruction and Data Cache
• Dynamic Split: Flexible Border Between Instruction and Data Cache
• Implementation of Counter-based Cache Replacement Algorithms with SimpleScalar
• MNM, V-way with CC-NUMA
• Probabilistic counter updates for predictor hysteresis and stratification
• Dynamic Branch Prediction with Perceptrons
• Survey of Power v/s Errors on Cache Memories
• Enabling Partial Cache Line Pre-fetching Through Data Compression
• Out-of-Order Commit Processors
• Adventures in CMT Cache Design